Product details
Dual 4-bit Decade Ripple Counter IC - 74HC390
The 74HC Series 74HC390 IC is a 16 Pin Dual 4-bit Decade Ripple Counter IC having a 2V to 6V Operating Voltage range. It has been divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decade or bi-quinary configuration. If master reset inputs 1MR and 2MR are used to clear all 8 bits of the counter simultaneously, numerous counting configurations are possible within one package.
Section clocks nCP0 and nCP1, allow ripple counter or frequency division applications of divide-by-2, 4, 5, 10, 20, 25, 50 or 100. The HIGH-to-LOW transition of the clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For bi-quinary decade operation, the nQ3 output is connected to the nCP0 input and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clocks and sets the four outputs LOW. Inputs include clamp diodes. It enables the use of current-limiting resistors to interface inputs to voltages in excess of VCC.
Pinout:
Pinout Of 74HC390 IC
Symbol
Pin
Description
1CP0, 2CP0
1, 15
Clock input divide-by-2 section (HIGH-to-LOW; edge-triggered)
1MR, 2MR
2, 14
Asynchronous master reset input (active HIGH)
1Q0, 1Q1, 1Q2, 1Q3
3, 5, 6, 7
Flip-flop outputs
1CP1, 2CP1
4, 12
Clock input divide-by-5 section (HIGH-to-LOW; edge-triggered)
GND
8
Ground (0 V)
2Q0, 2Q1, 2Q2, 2Q3
13, 11, 10, 9
Flip-flop output
VCC
16
Supply voltage
The 74HC Series 74HC390 IC is a 16 Pin Dual 4-bit Decade Ripple Counter IC having a 2V to 6V Operating Voltage range. It has been divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decade or bi-quinary configuration. If master reset inputs 1MR and 2MR are used to clear all 8 bits of the counter simultaneously, numerous counting configurations are possible within one package.
Section clocks nCP0 and nCP1, allow ripple counter or frequency division applications of divide-by-2, 4, 5, 10, 20, 25, 50 or 100. The HIGH-to-LOW transition of the clock inputs nCP0 and nCP1 triggers each section. For BCD decade operation, the nQ0 output is connected to the nCP1 input of the divide-by-5 section. For bi-quinary decade operation, the nQ3 output is connected to the nCP0 input and nQ0 becomes the decade output. A HIGH on the nMR input overrides the clocks and sets the four outputs LOW. Inputs include clamp diodes. It enables the use of current-limiting resistors to interface inputs to voltages in excess of VCC.
Pinout:
Pinout Of 74HC390 IC
Symbol
Pin
Description
1CP0, 2CP0
1, 15
Clock input divide-by-2 section (HIGH-to-LOW; edge-triggered)
1MR, 2MR
2, 14
Asynchronous master reset input (active HIGH)
1Q0, 1Q1, 1Q2, 1Q3
3, 5, 6, 7
Flip-flop outputs
1CP1, 2CP1
4, 12
Clock input divide-by-5 section (HIGH-to-LOW; edge-triggered)
GND
8
Ground (0 V)
2Q0, 2Q1, 2Q2, 2Q3
13, 11, 10, 9
Flip-flop output
VCC
16
Supply voltage
